Chip carriers Chip carriers A ball grid array is a type of surface-mount packaging used for integrated circuits. It is descended from the pin grid array (PGA), which is a package with one face covered (or partly covered) with pins in a grid pattern. These pins are used to conduct electrical signals from the integrated circuit to the printed circuit board (PCB) it is placed on. In a BGA, the pins are replaced by balls of solder stuck to the bottom of the package. The device is placed on a PCB that carries copper pads in a pattern that matches the solder balls. The assembly is then heated, either in a reflow oven or by an infrared heater, causing the solder balls to melt. Surface tension causes the molten solder to hold the package in alignment with the circuit board, at the correct separation distance, while the solder cools and solidifies. The composition of the solder alloy and the soldering temperature are carefully chosen so that the solder does not completely melt, but stays semi-liquid, allowing each ball to stay separate from its neighbours. ...more on Wikipedia about "Ball grid array"
CSP = Chip-scale Packaging, a style of integrated circuit package that has no pins or wires but uses contact pads instead. To be considered chip-scale packaging, the package must have an area no greater than 1.2 times that of the die packaged. ...more on Wikipedia about "Chip Scale Packaging"
CPGA stands for Ceramic Pin Grid Array, a type of connection for CPUs where the processor's die is attached to a heat-conducting ceramic plate which is pierced by an array of pins which make the requisite connections to the socket. ...more on Wikipedia about "CPGA"
DFN = Dual Flat No Lead, a style of integrated circuit package that has no pins or wires but uses contact pads instead. ...more on Wikipedia about "Dual Flat No Lead"
In microelectronics, a dual in-line package (DIP), sometimes called a DIL package, is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins, usually protruding from the longer sides of the package and bent downward. A DIP is usually referred to as a DIPn, where n is the total number of pins. ...more on Wikipedia about "Dual in-line package"
FBGA or Fine Ball Grid Array is a die-packaging technology for integrated circuits ...more on Wikipedia about "FBGA"
A flip chip is one type of IC chip mounting which does not require any wire bonds. Instead the final wafer processing step deposits solder beads on the chip pads. After cutting the wafer into individual dice, the "flip chip" is then mounted upside down in/on the package and the solder reflowed. Flip chips then normally will undergo an underfill process which will cover the sides of the die, similar to the encapsulation process. The terminology flip chip originates from the upside down (i.e. flipped) mounting of the die. This leaves the chip pads and their solder beads facing down onto the package, while the back side of the die faces up. This mounting is also known as the Controlled Collapse Chip Connection, or C4. ...more on Wikipedia about "Flip chip" Visit again www.shortopedia.com
Flip Chip Pin Grid Array (FC-PGA or FCPGA) is the package of certain Intel Celeron, Pentium III, and Pentium 4 microprocessors. FC-PGA processors fit into Socket 370 or Socket 478 motherboard sockets. ...more on Wikipedia about "Flip-chip pin grid array"
The land grid array (LGA) is a physical interface for microprocessors of the Intel Pentium 4 family. Unlike the pin grid array (PGA) interface found on most AMD and Intel processors, there are no pins on the chip; in place of the pins are pads of bare gold-plated copper that touch pins on the motherboard. ...more on Wikipedia about "Land grid array"
A leadless chip carrier (LCC) is a type of packaging for integrated circuits which has no "leads", but instead rounded pins through the edges of the ceramic package. ...more on Wikipedia about "Leadless chip carrier"
Low-insertion-force sockets (LIF) are often used for PGA or SPGA integrated circuits (ICs). The integrated circuit is simply pushed into the socket, and levered out when removing. Most modern motherboard processor sockets are now zero insertion force (ZIF) rather than LIF. The reason many motherboards are going to the ZIF style rather than the LIF style is because it became difficult to apply equal pressure onto a processor into a LIF port without the processor becoming misaligned in the LIF socket. ...more on Wikipedia about "Low insertion force"
A Low-profile Quad Flat Package (LQFP) is a surface mount integrated circuit package format with component leads extending from each of the four sides. Pins are numbered anti-clockwise from the index dot, and are spaced at 0.5 millimeter intervals. ...more on Wikipedia about "LQFP"
The Organic Pin Grid Array (OPGA) is a type of connection for integrated circuits, and especially CPUs, where the silicon die is attached to a plate out of an organic plastic which is pierced by an array of pins which make the requisite connections to the socket. ...more on Wikipedia about "OPGA"
The pin grid array or PGA is a type of packaging used for integrated circuits, particularly microprocessors. The integrated circuit (IC) is mounted in a ceramic slab of which one face is covered, or partially covered, in a square array of metal pins. The pins can then be inserted into the holes in a printed circuit board and soldered in place. They are almost always spaced a tenth of an inch (2.54 mm) apart. For a given number of pins, this type of package occupies less space than older types such as the dual in-line package (DIL or DIP). ...more on Wikipedia about "Pin grid array" Fast shortopedia
PLCC stands for Plastic Leaded Chip Carrier. ...more on Wikipedia about "Plastic leaded chip carrier"
A QFP or Quad Flat Package is an integrated circuit device with component leads extending from each of the four sides. ...more on Wikipedia about "QFP"
Shrink small-outline package (SSOP). A microchip package for surface-mount technology with "gull wing" leads protruding from the two long sides and a lead spacing of 0.025 inches. ...more on Wikipedia about "Shrink small-outline package"
In electronics, a single in-line package is an electronic device package which has one row of connecting pins. It is not as popular as the dual in-line package, but has been used for packaging RAM chips and multiple resistors with a common pin. ...more on Wikipedia about "Single in-line package"
Small-Outline Integrated Circuit (SOIC). A carrier which occupies an area about 30 - 50% less than an equivalent DIP, with a typical thickness that is 70% less. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches. ...more on Wikipedia about "Small-Outline Integrated Circuit"
Surface mount technology (SMT) is a method for constructing electronic circuits in which the components are mounted directly onto the surface of printed circuit boards (PCBs). Electronic devices so made are called surface-mount devices or SMDs. In the industry it has largely replaced the previous construction method of fitting components with wire leads into holes in the circuit board (also called through-hole technology). ...more on Wikipedia about "Surface-mount technology"
TSOP is an acronym of Thin Small-Outline Package. ...more on Wikipedia about "Thin small-outline package" Just http://www.shortopedia.com way
Thin Quad Flat Pack. Type of IC packaging that significantly reduces the amount of space required by a chip on a circuit board. TQFP packaging is ideal for space conscious applications such as PCMCIA cards. ...more on Wikipedia about "TQFP"
A TSSOP (Thin-Shrink Small Outline Package) is a four-sided, rectangular, thin body size surface mount component. A Type I TSSOP has leads protruding from the width portion of the package. A Type II TSSOP has the leads protruding from the length portion of the package. A TSSOP's lead count can range from 8 to 56. ...more on Wikipedia about "TSSOP"
:UICC can also mean International Union Against Cancer (Union Internationale contre le Cancer). ...more on Wikipedia about "UICC"
The zig-zag in-line package or ZIP was a short-lived packaging technology for integrated circuits, particularly dynamic RAM chips. It was intended as a replacement for dual in-line packaging (DIL or DIP). A ZIP is an integrated circuit encapsulated in a slab of plastic, measuring about 3 mm x 30 mm x 10 mm. The package's pins protrude in two rows from one of the long edges. The two rows are staggered by 1.27 mm (0.05"), giving them a zig-zag appearance, and allowing them to be spaced more closely than a rectangular grid would allow. The pins are inserted into holes in a printed circuit board, with the packages standing at right-angles to the board, allowing them to be placed closer together than DIPs of the same size. ZIPs have now been superseded by surface-mount packages such as the thin small-outline packages ( TSOPs) used on single-in-line memory modules ( SIMMs) and dual-in-line memory modules ( DIMMs). ...more on Wikipedia about "Zig-zag in-line package" The view on shortopedia. Chip_carriers
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